1. Field of the Invention
Aspects of the present invention relate to video decoding technology, and, more particularly, to a multi-core processor device and a video decoding method using a multi-core processor, which can efficiently use system resources in a multi-core processor environment that requires a considerable amount of computation.
2. Description of the Related Art
As information technology including Internet-related techniques develops, an increasing number of people are engaging in video communication as well as text and voice communication. Since conventional text-based communication methods are insufficient to meet various demands from users, the demand for multimedia services that can provide various types of data such as text, video, and music data has steadily grown. Due to the large size of multimedia data, storage media having a large storage capacity are required to store multimedia data, and wide bandwidths are required to transmit multimedia data. Therefore, compression coding techniques are essential for the transmission of multimedia data including text, video and audio data.
One of the basic principles for the compression of data is to remove redundancy in the data. Since video data generally has a larger size than other types of multimedia data, it is important to effectively compress video data.
The compression of video data is generally characterized by removing spatial redundancy, such as repetitions of the same color or the same object within a single picture or frame; removing temporal redundancy, such as repetitions of the same sound over time; and removing perceptive redundancy in consideration of the properties of human perception, such as insensitivity to high frequencies. Conventionally, temporal redundancy in data is removed using a motion compensation-based temporal filtering method, and spatial redundancy in data is removed using a spatial transform method.
Conventionally, the coding and decoding of video data is performed by single-core processors. However, as multi-core processors that can provide more powerful functions than single-core processors are becoming widespread, multi-core processors are becoming widely used in various fields, including the field of video coding/decoding that requires considerable amounts of system resources.
Multi-core processors are integrated circuits (ICs) having two or more cores integrated therein and are thus capable of providing powerful functions, reducing power consumption and effectively processing more than one task at the same time. Multi-core processors are comparable to computers having two or more independent processors. However, multi-core processors have two or more processors plugged into the same socket and can thus provide a better connection between the processors. Theoretically, the performance of dual-core processors is twice the performance of single-core processors. However, in practice, the performance of dual-core processors is only about 1.5 times better than the performance of single-core processors. Since it is generally believed that single-core processors have reached a limit in terms of complexity and speed, the growth of multi-core processor-related industry has recently been expedited. There are many multi-core processor makers, such as AMD, ARM, and Intel, that are gearing up to develop better products in anticipation that multi-core processors will prevail in the near future.
Conventional video decoding methods using a multi-core processor are largely classified into a functional division method and a data division method. FIGS. 1 and 2 explain the functional division method. Referring to FIG. 1, in order to perform a video decoding operation, a processor needs to perform various functions such as data reading, preprocessing/initialization, entropy decoding, inverse quantization, inverse transform, intra-prediction, motion compensation, and deblocking and data writing.
In the functional division method, a plurality of cores of a processor may be determined in advance to perform certain functions only. For example, core 2 may only perform entropy encoding, and core 4 may only perform deblocking. In this case, imbalances may occur among computation amounts 21 through 24 of cores 1 through 4, as shown in FIG. 2. In particular, core 3 having a relatively excessive load may serve as a critical path and may thus deteriorate the performance of the whole processor. The functional division method is easy to implement. However, since the amount of time taken to process functions varies from one core to another core of a multi-core processor, it is difficult to properly process more than one task in parallel using the functional division method and thus to fully utilize the functions of a multi-core processor.
FIG. 3 explains the data division method. Referring to FIG. 3, the data division method may be characterized by dividing a single picture 30 into, for example, four equal regions (i.e., regions 1 through 4), and allocating regions 1 through 4 to cores 1 through 4, respectively. Then, regions 1 through 4 can be processed by cores 1 through 4, respectively.
The data division method can secure high parallelism for simple data processes. However, the data division method is difficult to implement, especially when there is dependency between data processes. In order to address these difficulties, additional processes, such as the division of data and the prediction of the relationship between computation loads, are required. Thus, the performance of a multi-core processor may deteriorate considerably. In addition, the data division method requires each core of a multi-core processor to be equipped with all functions for performing a video decoding operation and thus causes inefficiency in the use of system resources (such as local storage). In particular, H.264 decoders, which have been widely used in recent years, have larger computation amounts and higher inter-function dependency than decoders based on other standards and thus may not be able to fully perform the functions of multi-core processors.